New Performance Driven Routing Techniques With ExplicitArea / Delay Tradeo and Simultaneous Wire Sizing

We present new algorithms for construction of performance driven Rectilinear Steiner Trees under the Elmore delay model. Our algorithms represent a departure from previous approaches in that we derive an explicit area/delay tradeoo curve. We achieve this goal by limiting the solution space to the set of topologies induced by a permutation on the sinks of the net. This constraint allows eecient identiication of optimal solutions while still providing a rich solution space. Our approach also incorporates simultaneous wire sizing. Experimentally we have observed that routing topologies produced by previously proposed approaches consume up to 70% more area on average than topologies achieving equal or better delay produced by our algorithm. Our approach has also yielded improved minimum delay and has been adapted to improve a given routing topology for area minimization with good results.